Renesas Electronics /R7FA6M4AF /SYSC /SCKDIVCR

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Interpret as SCKDIVCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Others)PCKD0 (Others)PCKC0 (000)PCKB0 (Others)PCKA0 (Others)ICK0 (Others)FCK

PCKC=Others, FCK=Others, PCKA=Others, ICK=Others, PCKD=Others, PCKB=000

Description

System Clock Division Control Register

Fields

PCKD

Peripheral Module Clock D (PCLKD) Select

0 (000): x 1/1

0 (Others): Setting prohibited.

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

PCKC

Peripheral Module Clock C (PCLKC) Select

0 (000): x 1/1

0 (Others): Setting prohibited.

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

PCKB

Peripheral Module Clock B (PCLKB) Select

0 (Others): Setting prohibited.

0 (000): x 1/1

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

PCKA

Peripheral Module Clock A (PCLKA) Select

0 (000): x 1/1

0 (Others): Setting prohibited.

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

ICK

System Clock (ICLK) Select

0 (000): x 1/1

0 (Others): Setting prohibited.

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

FCK

FlashIF Clock (FCLK) Select

0 (000): x 1/1

0 (Others): Setting prohibited.

1 (001): x 1/2

2 (010): x 1/4

3 (011): x 1/8

4 (100): x 1/16

5 (101): x 1/32

6 (110): x 1/64

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